1. Field of the Invention
The present invention relates to a driving circuit for a liquid crystal display, and especially a driving circuit for a liquid crystal display used for an LCD television set, or the like.
2. Description of the Prior Art
An active matrix type liquid crystal display has been recently put into practical use for color television sets, or the like, which has thin film transistors on every liquid crystal cell used as picture elements so as to realize a high quality display. However, the lowering of the driving voltage and reduction in the consumption of electric power by a driving circuit for the liquid crystal display have become of great importance. A conventional driving circuit for a liquid crystal display is described in the following by referring to FIG. 1, FIG. 2, FIG. 3 and FIG. 4 (a) to FIG. 4 (j).
FIG. 1 shows a constitution of a generally used matrix type liquid crystal display. In FIG. 1 a picture element is constituted by three kinds of components, namely liquid crystal cell 1, a capacitor 2 for memorizing and thin film transistor 3 (hereinafter abbreviated as TFT). Vertical lines 4 and horizontal lines 5 respectively corresponding to X-electrodes and Y-electrodes of the X-Y matrix. Each horizontal line 5 is connected to a scanning circuit 6, and each vertical line 4 is connected to a series-parallel transforming circuit 7, which transforms serial image signals of horizontal scanning into a number of X-electrode parallel image signals of a certain number of X-electrodes by sampling and holding the image signals. Vertical lines 4 and horizontal lines 5 are also connected to a common electrode 8.
FIG. 2 shows a conventional driving circuit for X-electrodes and a common electrode; FIG. 3 shows a conventional driving circuit for Y-electrodes; and FIG. 4 (a), FIG. 4 (b), FIG. 4 (c), FIG. 4 (d), FIG. 4 (e), FIG. 4 (f), FIG. 4 (g), FIG. 4 (h), FIG. 4 (i), and FIG. 4 (j) show waveforms of correspondingly alphabetized points in FIG. 2 and FIG. 3.
In FIG. 2, when a start pulse for scanning shown in FIG. 4 (a) is supplied to a terminal 9, the output signal of flip-flop 10 changes from "0" to "1" or changes from "1" to "0". Terminals 11 and 12 are respectively supplied with image signals having reversed polarity with respect to each other. In time period -A- of FIG. 4 (b), wherein the output of the flip-flop 10 is "0", a transistor 13 is placed in the off state and a transistor 14 also is placed in an off state. Accordingly, the collector voltage of the transistor 14 becomes 2 V as shown by line -b'- in FIG. 4 (b), and at the same time a voltage supplied to the common electrode 8 becomes 2 V. Analogue switch 16 is turned on by the reception of a "0" output from the flip-flop 10 and a "1" output from inverter 15, and image signals issued to the terminal 11 (which is 6 V as shown by two-dotted chain line b") in FIG. 4 (b) are supplied to the series-parallel transforming circuit 7. Next, in a time period -B- of FIG. 4 (b), wherein the output of the flip-flop is "1", the transistors 13 and 14 are both turned on, and the supplied voltage of the common electrode 8 becomes 8 V as shown by real line -b'- in FIG. 4 (b). Analogue switch 17 is then turned on by a "1" output from the flip-flop 10 and a "0" output from the inverter 15, and image signals impressed on the terminal 12 (which is 4 V as shown by two dotted chain line -b"- in FIG. 4 ( b)) are supplied to the series-parallel transforming circuit 7. The series-parallel transforming circuit 7 is for sampling and holding the series of supplied image signals of each picture element as they are and then transforming them to parallel signals. Such transformed signals are then supplied on each X-electrode 4.
In the conventional driving circuit for a liquid crystal display constituted as above-mentioned, the voltages of the common electrode and the X-electrodes together repeat the turning-over in synchronism in response to the start pulse for scanning.
In FIG. 3, when the above-mentioned start pulse for scanning (which is shown in FIG. 4 (A) is supplied to a terminal 18 of the scanning circuit 6, the voltage of the pulse is amplified from a level of 0-5 V to a level of 0-15 V by level shifter 19, and the amplified pulse is supplied to a shift register 20. By receiving such an amplified pulse, the shift register 20 starts a shift action, and it generates pulses for scanning Y-electrodes 5 serially from the top line to the bottom line. FIG. 4 (c) shows the voltage of the top line of the Y-electrodes 5, and FIG. 4 (d) shows the voltage of the bottom line of the Y-electrodes 5. Such voltages of Y-electrodes correspond to voltages of the gate signals of TFT (thin film transistor) 3.
As shown in FIG. 1 and FIG. 3, the Y-electrodes are respectively connected to the gate electrodes of TFT 3; the X-electrodes are respectively connected to the drain electrodes of TFT 3; and each of one terminal 21 of the liquid crystal cell 1 and the capacitor 2 for memorizing are resectively connected to the source electrodes of the TFT 3. Furthermore, the common electrode 8 is connected to each of other terminals of the liquid crystal cell 1 and the capacitors 2 for memorizing by terminal 21'. The drain electrodes and source electrodes are named as above-mentioned for the convenience of description.
Elucidation is made in detail of the voltages which are impressed on the liquid crystal cell 1 by referring to FIG. 4 (a) to FIG. 4 (j). FIG. 4 (a) shows the start pulse which is impressed on the input terminal 9, which is the start-up signal for scanning and changing of polarity (a vertical synchronization signal separated from the image signal is used ) of flip-flop 10, and the waveform shown by real line -b'- in FIG. 4 (b) shows the voltage impressed on the common electrode 8, whereas the waveform shown by two dotted chain line -b"- in FIG. 4 (b) shows the voltage of the image signal impressed on the drain electrode of TFT 3, which is a constant luminance signal in one vertical scanning period.
FIG. 4 (c) shows the gate voltage impressed on the gate electrode of the TFT 3 on the top line, and FIG. 4 (d) shows the gate voltage impressed on the gate electode of the TFT 3 on the bottom line. By such a gate voltage, all of the TFTs 3, 3 . . . are switched on and off. FIG. 4 (e), on the other hand, shows the source voltage of TFT 3 on the top line which is impressed on one terminal 21 of the liquid crystal cell 1 and the capacitor 2. During the time period -B- in FIG. 4 (b), when the gate voltage of TFT 3 on the top line becomes 15 V (shown in FIG. 4 (c)) and TFT 3 turns on, the voltage of the terminal 21 of the liquid crystal cell 1 becomes 4 V, equal to the voltage of image signals -b"-, and such voltage is maintained by the capacitor 2 in spite of the turning off of TFT 3. After that, when the voltage of one terminal 21 of the liquid crystal cell 1, which is connected to the common electrode 8, is decreased by 6 V by the changing of polarity of flip-flip 10, the voltage of another terminal 21' of the liquid crystal cell 1 is also decreased by 6 V by the action of the capacitor 2, and as a result, the voltage becomes -2 V.
Next, during the time period -A- in FIG. 4 (b), when the gate voltage of TFT 3 on the top line becomes 15 V (shown in FIG. 4 (c)) and TFT 3 turns on, the voltage of the terminal 21 of the liquid crystal cell 1 becomes 6 V as shown by -b"-, and such voltage is maintained even after the turning off of TFT 3. After that, when the voltage of one terminal 21 of the liquid crystal cell 1 is increased by 6 V, the voltage of the other terminal 21' of the liquid crystal cell 1 is also increased by 6 V, and as a result, the voltage becomes 12 V. Such actions are repeated. Accordingly, the voltage impressed across both terminals of the liquid crystal cells 1 on the top line correspond to a voltage of the waveform shown in FIG. 4 (g), which is obtained by subtracting the voltage -e- shown in FIG. 4 (e) from the voltage -b'- shown in FIG. 4 (b).
Namely, whenever tft 3 turns on, the polarity of impressed voltages changes. FIG. 4 (f) shows the source voltage of TFT 3 on the bottom line which corresponds to the voltage of the terminal 21 of the liquid crystal cell 1, and when TFT 3 on the bottom line is turned on by the gate voltage shown in FIG. 4 (d), the voltage of the image signal -b'- in FIG. 4 (b) is supplied to the liquid crystal cell 1. Other actions are the same as described in FIG. 4 (e), and the voltage impressed on both terminals of the liquid crystal cell 1 on the bottom line corresponds to a voltage of the waveform shown in FIG. 4 (h), which is obtained by subtracting the voltage -f- in FIG. 4 (f) from the voltage -b'- shown in FIG. 4 (b).
Furthermore, a waveform shown in FIG. 4 (i) shows the voltage Vgs between the gate and the source of TFT 3 on the top line, which is given by subtracting the voltage shown in FIG. 4 (e) from the voltage shown in FIG. 4 (c). The waveform shown in FIG. 4 (j) shows the voltage Vgs between the gate and the source of TFT 3 on the bottom line, which is given by subtracting the voltage shown in FIG. 4 (f) from the voltage shown in FIG. 4 (d).
The voltage of an image signal maintained by the capacitor 2 for memorizing is, however, discharged with RC time current determined by the capacitance of the memory capacitor 2 and the resistance of TFT 3 when TFT 3 is off. Since the capacitance of this memory capacitor 2 is as small as 1 pF, a current ratio of ON vs OFF of TFT 3 of about 10.sup.6 is needed for maintaining the voltage of image signals at a nearly constant value during one scanning period in order to correspond to the repetition period of the gate voltage of transistor 14 in FIG. 2. This is shown in FIG. 4 (c) and (d). On the other hand, a cut-off voltage of TFT 3 which is needed to make TFT 3 turn off is Vgs=-3 V. If Vgs is higher than -3 V, it is impossible to maintain the voltage of image signals constant because electric current flows to TFT 3 and the time current for discharging becomes smaller.
Accordingly, in the above-mentioned case, when Vgs on the top line shown in FIG. 4 (i) becomes 2 V, the electric current flows to TFT 3 and a change of voltage as shown by the dotted line in FIG. 4 (e) occurs in the source a voltage. As a result, voltage drop shown by the dotted line in FIG. 4 (g) occurs in the voltage impressed across both terminals of the liquid crystal cell 1 on the top line, and the luminance level in such part also changes. Similarly, when Vgs on the bottom line shown in FIG. 4 (j) becomes 2 V, the electric current flows to TFT 3 too, and a voltage change as shown by the dotted line in FIG. 4 (f) occurs in the source voltage. As a result, a voltage drop shown by the dotted line in FIG. 4 (h) occurs in the voltage impressed across both terminals of the liquid crystall cell 1 on the bottom line, and the luminance level in such part also changes.
As mentioned above, by comparing the waveforms shown in FIG. 4 (g) and (h), it is known that the voltage drop of the luminance level on the bottom part lines is larger than that of the top lines, because of a longer time period for electric current flowing to TFT 3. As a result, the conventional driving circuit for a liquid crystal display has a shortcoming of inclination of luminance from the upper part to the lower part of the display.